RAM 6.0 BUX II Series Guia do Utilizador

VxWorks6.0HARDWARE CONSIDERATIONS GUIDE ®VxWorks Hardware Considerations Guide

VxWorksHardware Considerations Guide, 6.0 6with this buffer. Having done all this, memory buffers for DMA operations are relatively safe from the eff

5. Memory7Higher-level transcendental functions are supported in VxWorks in one of these ways: A portable version that avoids using any floating-poi

VxWorksHardware Considerations Guide, 6.0 8RAM VxWorks CISC processors require 1 MB of RAM for a development system that includes the standard VxWork

6. Bus Support9NV_RAM_SIZE, NV_BOOT_OFFSET, and NV_RAM_ADRS. These macros are usually defined in config.h, bspname.h, or configAll.h.Parity Checking

VxWorksHardware Considerations Guide, 6.0 10pciConfigLib, pciConfigShow, pciAutoCfg, and pciIntLib for more information. Wind River Technical Note #4

6. Bus Support11because all VME device drivers are configurable. However, conflicting devices may be a system issue. Dynamic Bus Sizing on VMEbus Acc

VxWorksHardware Considerations Guide, 6.0 12most applications, this is not a problem. However, for applications with extremely low latency requiremen

6. Bus Support13Multiple bus request/grant levels may be critical for systems with many masters in the backplane; with round-robin arbitration it can

VxWorksHardware Considerations Guide, 6.0 14VMEbus Interrupts Although VxWorks does not require VMEbus interrupts, it is a good idea to support all V

7. Devices15or an In-Circuit Emulator. Emulator object file formats and operations are as varied as the vendors that sell them. Contact Wind River fo

Copyright © 2004 Wind River Systems, Inc. All rights reserved. No part of this publication may be reproduced or transmitted in any form or by any me

VxWorksHardware Considerations Guide, 6.0 16corruption. Ideally, the driver can disable only the interrupt from the device the driver controls. Howev

7. Devices17after reset, some programming of the device or other circuits must be done at kernel initialization time, to cause the device to de-asser

VxWorksHardware Considerations Guide, 6.0 18Timestamp ClockMany of the generic timers in target/src/drv/timer include timestamp functionality. A time

7. Devices19Ethernet ControllersVxWorks is very “network oriented,” at least during the development phase; thus, it is highly desirable to have a net

VxWorksHardware Considerations Guide, 6.0 20Designing a CPU board to include an Ethernet chip saves the expense of additional off-board networking ha

7. Devices21DMA ControllersDMA controllers can free the processor of lengthy copies to I/O devices or off-board memory and may optionally be used by

VxWorksHardware Considerations Guide, 6.0 22Parallel Ports VxWorks provides simple support of parallel ports. Refer to directory target/src/drv/paral

8. Flash Devices and Flash File System Support238.2 Choosing TrueFFS as a MediumTrueFFS applications can read and write from flash memory just as th

VxWorksHardware Considerations Guide, 6.0 24Block Allocation and Data Clusters As is required of a block device driver, TrueFFS maps flash memory int

8. Flash Devices and Flash File System Support25 Localizes Static File Blocks. Localizing blocks that belong to static files significantly facilitate

iiiContents1 Introduction ... 12 Minimum Sys

VxWorksHardware Considerations Guide, 6.0 26block now maps to the area of flash that contains the modified data. This mapping information is protecte

8. Flash Devices and Flash File System Support27known as the cycling limit, depends on the specific flash technology, but it ranges from a hundred th

VxWorksHardware Considerations Guide, 6.0 28degradation of performance. Given the large number of allowed erase cycles, this less-than-absolute appro

8. Flash Devices and Flash File System Support29TrueFFS can recover from the fault in all cases except when new data is being written to flash for th

VxWorksHardware Considerations Guide, 6.0 30Recovering During Garbage Collection After a fault, any garbage collection in process at the time of the

10. Partial Compliance to Standards31Note that some processors have special requirements related to virtual memory. 10. Partial Compliance to Standa

VxWorksHardware Considerations Guide, 6.0 32transactions on the PCI bus. The result was that every device driver for devices which might be placed on

VxWorksHardware Considerations Guide, 6.0 iv7 Devices ...

1VxWorksHardware Considerations Guide6.01. IntroductionVxWorks runs on many architectures and targets from a wide variety of vendors, including custo

VxWorksHardware Considerations Guide, 6.0 2The particulars of how an individual architecture implements these considerations are discussed in the VxW

3. Processor and Architecture Support3A bank of software controlled LEDs is also a desirable feature for the board. During development, they can indi

VxWorksHardware Considerations Guide, 6.0 44. Architecture ConsiderationsAt the core of any VxWorks run-time environment is the target architecture.

4. Architecture Considerations5take tens of uninterruptable microseconds. The operating system and application also contribute to interrupt latency b