RAM 6.0 BUX II Series Guia do Utilizador descarregar pdf (Página 61)

2 Overview of a BSP

2.5 Avoiding Common Problems

Incorrect example 3:

/* WRONG: DO NOT use a magic number in assembly source! */

lis r6, 0 /* load r6 with the address */

addi r6, r6, 0 /* of ROM_TEXT_ADRS */

Incorrect example 4:

/* WRONG: DO NOT define a macro as a magic number! */

#define BRGCLK_RATE 0x16e3600

ppc860Chan [i].clockRate = BRGCLK_RATE;

Incorrect example 5:

/* WRONG: DO NOT assume the high-order bits are zero! */

lis r6, 0 /* load r6 with the address */

addi r6, r6, LO(ROM_TEXT_ADRS) /* of ROM_TEXT_ADRS */

Non-Maskable Interrupts (NMI)

Because the kernel uses intLock( ) as the primary method of protecting kernel data

structures, using non-maskable interrupts should be avoided. If an NMI interrupt

service routine (ISR) makes a call to VxWorks that results in a kernel object being

changed, protection is lost and undesirable behavior can be expected. For more

information on ISRs at high interrupt levels, see the VxWorks Kernel Programmer’s

Guide.

Also, note that a VxWorks routine marked as interrupt safe does not mean it is NMI

interrupt safe. On the contrary, many routines marked as interrupt safe are actually

unsafe for NMI.

On some architectures, the use of NMI cannot be tolerated for anything other than

rebooting the target or permanently halting the target in order to retrieve the

contents of memory. For example, on PowerPC, if an NMI occurs while certain

sections of code are being executed, information about the return address is

irrevocably lost. In this case, the processor is never able to return from the NMI ISR

to that previously running code, regardless of the action taken by the NMI ISR.

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RAM 6.0 BUX II Series Guia do Utilizador Página 61